The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Dec. 05, 2024
Applicant:

Winbond Electronics Corp., Taichung City, TW;

Inventors:

I-Hsien Tseng, Taichung City, TW;

Lung-Chi Cheng, Taichung City, TW;

Hsiu-Han Liao, Taichung City, TW;

Assignee:

Winbond Electronics Corp., Taichung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/56 (2006.01); G11C 16/34 (2006.01); G11C 29/02 (2006.01); G11C 29/04 (2006.01); G11C 29/38 (2006.01); G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
G11C 29/56004 (2013.01); G11C 16/3436 (2013.01); G11C 16/344 (2013.01); G11C 16/3463 (2013.01); G11C 16/3472 (2013.01); G11C 29/022 (2013.01); G11C 29/04 (2013.01); G11C 29/38 (2013.01); G11C 29/50 (2013.01); G11C 29/56016 (2013.01); G11C 2029/0403 (2013.01); G11C 2029/5006 (2013.01);
Abstract

A flash memory and a testing method thereof are provided. The testing method includes following steps: performing an erase verification reference value adjustment step, including adjusting a erase verification current from a normal erase verification current to a fast bit screening erase verification current, and adjusting a soft program verification current from a normal soft program verification current to a fast bit screening soft program verification current; performing an erase operation on memory cells in which the fast bit screening erase verification current is adopted to perform a corresponding erase verification; performing a soft program operation on the memory cells in which the fast bit screening soft program verification current is adopted to perform a corresponding soft program verification; and applying a test voltage to word lines coupled to the memory cells to determine whether the memory cells are defective memory cells or normal memory cells a obtained cell currents.


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