The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Jun. 28, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nita Chandrasekhar, Portland, OR (US);

Vishal Tiwari, Hillsboro, OR (US);

Akm Shaestagir Chowdhury, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/42 (2026.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/42 (2026.01); H10W 20/057 (2026.01); H10W 20/076 (2026.01); H10W 20/082 (2026.01); H10W 20/093 (2026.01);
Abstract

Embodiments disclosed herein include integrated circuit structures and methods of forming such structures. In an embodiment, an integrated circuit structure comprises a dielectric layer with a first surface and a second surface, and an opening through the dielectric layer. In an embodiment, the opening is defined by sidewalls. In an embodiment, a graphene liner contacts the first surface of the dielectric layer and the sidewalls of the opening. In an embodiment, a conductive material at least partially fills a remainder of the opening.


Find Patent Forward Citations

Chandrasekhar, Nita. (2026). Selective bottomless graphene lined interconnects (U.S. Patent No. 12733478). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12733478

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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