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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12727498 B1

PDFFull Text
Date of Patent:
Sep. 01, 2026

Filed:

May. 29, 2024

Semiconductor package and method of manufacturing the semiconductor package

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Solji Song, Suwon-si, KR;

Byeongchan Kim, Asan-si, KR;

Jumyong Park, Cheonan-si, KR;

Jinho An, Seoul, KR;

Chungsun Lee, Asan-si, KR;

Jeonggi Jin, Seoul, KR;

Juil Choi, Seongnam-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Gyeonggi-do, KR;

Attorney:

Harness, Dickey & Pierce, P.L.C.

Primary Examiner:

Lawrence C Tynes, Jr

Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H10W 70/60 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/65 (2026.01); H10W 70/611 (2026.01); H10W 70/685 (2026.01); H10W 90/00 (2026.01); H10W 90/724 (2026.01);
Abstract

A semiconductor package includes an interposer having a first surface and a second surface opposite to the first surface and including a plurality of bonding pads, and first and second semiconductor devices on the interposer. Each of the plurality of bonding pads includes a first pad pattern provided to be exposed from the first surface and having a first width and a second pad pattern provided on the first pad pattern and having a second width greater than the first width.

Find Patent Forward Citations

Song, Solji. (2026). Semiconductor package and method of manufacturing the semiconductor package (U.S. Patent No. 12727498). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12727498

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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