The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Jul. 11, 2023
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Xinru Zeng, Wuhan, CN;

Peng Chen, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10B 80/00 (2023.01); H10W 40/10 (2026.01); H10W 90/24 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10B 80/00 (2023.02); H10W 40/10 (2026.01); H10W 90/701 (2026.01); H10W 90/24 (2026.01); H10W 90/722 (2026.01); H10W 90/732 (2026.01);
Abstract

The present disclosure provides a semiconductor package structure, a fabrication method, and a memory system. The semiconductor package structure includes a plurality of package bodies stacked in a first direction. At least one of the plurality of package bodies includes first interconnect structures extending in the first direction and a plurality of sub package bodies stacked in the first direction. Each of the plurality of sub package bodies includes a molding body and a device structure encapsulated in the molding body. The device structure includes a passive device. The passive device includes at least one of a resistor, a capacitor, and an inductor.


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