The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Feb. 20, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kao-Cheng Lin, Hsinchu, TW;

Yen-Huei Chen, Hsinchu, TW;

Wei Min Chan, Hsinchu, TW;

Hidehiro Fujiwara, Hsinchu, TW;

Wei-Cheng Wu, Hsinchu, TW;

Pei-Yuan Li, Hsinchu, TW;

Chien-Chen Lin, Hsinchu, TW;

Shang Lin Wu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01);
Abstract

A memory circuit includes an array including a plurality of memory cells arranged across a plurality of columns and a plurality of voltage control circuits, each of the plurality of voltage control circuits operatively coupled to the memory cells of a corresponding one of the plurality of columns. Each of the plurality of voltage control circuits includes a first portion configured to provide a first voltage drop in coupling a supply voltage to the memory cells of the corresponding column and a second portion configured to provide a second voltage drop in coupling the supply voltage to the memory cells of the corresponding column. The first voltage drop is substantially smaller than the second voltage drop.


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