The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 2026
Filed:
May. 10, 2023
Applicant:
Wuhan Xinxin Semiconductor Manufacturing Co., Ltd., Wuhan, CN;
Inventors:
Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
U.S. Cl.
CPC ...
H10W 90/00 ; H10W 46/00 ; H10P 10/12 ; H10P 72/7416 ; H10W 74/43 ; H10W 46/501 ; H10W 46/603 ; H10W 90/732 ; H10W 70/099 ; H10P 72/743 ; H10W 72/823 ; H10W 74/114 ; H10W 72/073 ; H10W 46/301 ; H10W 46/607 ; H10W 90/28 ; H10W 80/00 ; H10W 20/20 ; H10W 80/312 ; H10W 90/20 ; H10W 90/794 ; H10W 72/0198 ; H10W 90/22 ; H10P 72/74 ; H10W 72/941 ; H10W 72/07323 ; H10W 80/327 ; H10W 70/09 ; H10W 90/792 ; H10W 70/60 ;
Zhan, Di. (2026). First chip and wafer bonding method and chip stacking structure (U.S. Patent No. 12713934). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12713934
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile