The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2026
Filed:
Jul. 04, 2023
United Microelectronics Corp., Hsin-Chu City, TW;
Chun-Hsien Huang, Tainan City, TW;
Yu-Tse Kuo, Tainan City, TW;
Shu-Ru Wang, Taichung City, TW;
Li-Ping Huang, Miaoli County, TW;
Chun-Yen Tseng, Tainan City, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu City, TW;
Abstract
The invention provides a layout pattern of static random access memory (SRAM), which comprises a substrate, and a plurality of fin structures and a plurality of gate structures are located on the substrate to form a plurality of transistors. The plurality of transistors comprise a first pull-up transistor (PU), a first pull-down transistor (PD), a second pull-up transistor (PU), a second pull-down transistor (PD), a first access transistor (PGA), a second access transistor (PGB), a third access transistor (PGA) and a fourth access transistor (PGB). A first word line contact pad connected to a gate of the first access transistor (PGA) and a first word line, and a second word line contact pad connected to a gate of the second access transistor (PGB) and a second word line, the first word line contact pad and the second word line contact pad do not overlap in a vertical direction.