The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

Oct. 12, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yu-Chang Lin, Hsinchu City, TW;

Sih-Jie Liu, Hsinchu County, TW;

PO-Kang Ho, Taoyuan City, TW;

Liang-Yin Chen, Hsinchu City, TW;

Tsai-Yu Huang, Taoyuan City, TW;

Chi On Chui, Hsinchu City, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/13 (2025.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01); H10P 30/20 (2026.01); H10P 32/10 (2026.01); H10P 32/14 (2026.01);
U.S. Cl.
CPC ...
H10D 62/151 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6729 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 64/017 (2025.01); H10D 84/0167 (2025.01); H10D 84/017 (2025.01); H10D 84/0186 (2025.01); H10D 84/038 (2025.01); H10D 84/85 (2025.01); H10P 30/204 (2026.01); H10P 30/21 (2026.01); H10P 32/1406 (2026.01); H10P 32/171 (2026.01);
Abstract

A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of semiconductor layers vertically stacked over a substrate, wherein the semiconductor layers are vertically spaced apart from each other; forming a source/drain epitaxial structure on sides of the semiconductor layers, wherein the source/drain epitaxial structure is doped with a p-type doping species; implanting fluorine ions into the source/drain epitaxial structure; after implanting fluorine ions into the source/drain epitaxial structure, performing an annealing process to diffuse the p-type doping species into a side region of a topmost one of the semiconductor layers; and forming a source/drain contact over the source/drain epitaxial structure.


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