The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Aug. 16, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tzuan-Horng Liu, Longtan Township, TW;

An-Jhih Su, Taoyuan City, TW;

Mill-Jer Wang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H10P 50/00 (2026.01); H10P 50/26 (2026.01); H10P 50/66 (2026.01); H10P 74/20 (2026.01); H10W 20/00 (2026.01); H10W 20/20 (2026.01); H10W 90/00 (2026.01); H10W 74/15 (2026.01); H10W 80/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/056 (2026.01); H10P 50/267 (2026.01); H10P 50/667 (2026.01); H10P 50/691 (2026.01); H10P 74/207 (2026.01); H10W 20/043 (2026.01); H10W 20/076 (2026.01); H10W 20/089 (2026.01); H10W 20/20 (2026.01); H10W 90/00 (2026.01); H10W 74/15 (2026.01); H10W 80/312 (2026.01); H10W 80/327 (2026.01); H10W 90/722 (2026.01); H10W 90/724 (2026.01); H10W 90/732 (2026.01); H10W 90/754 (2026.01); H10W 90/792 (2026.01);
Abstract

An embodiment is a method including a first dielectric layer over a first substrate, the first dielectric layer having a first metallization pattern therein. The method also includes forming a second dielectric layer over the first dielectric layer and the first metallization pattern. The method also includes forming a sacrificial pad over and extending into the second dielectric layer, the sacrificial pad being electrically coupled to a first conductive feature in the first metallization pattern. The method also includes performing a circuit probe test on the sacrificial pad. The method also includes after performing the circuit probe test, performing an etch process, the etch process removing the sacrificial pad.


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