The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2026

Filed:

Jan. 17, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Tsung Hsien Tsai, Hsinchu, TW;

Cheng Yu Huang, Hsinchu, TW;

Jen-Cheng Liu, Hsin-Chu City, TW;

Keng-Yu Chou, Kaohsiung City, TW;

Ming-En Chen, Tainan City, TW;

Shyh-Fann Ting, Tainan City, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10F 39/12 (2025.01); H10F 39/00 (2025.01);
U.S. Cl.
CPC ...
H10F 39/199 (2025.01); H10F 39/024 (2025.01); H10F 39/811 (2025.01);
Abstract

A process of forming a back side deep trench isolation structure for an image sensing device includes etching first trenches in the back side of a semiconductor substrate, lining the first trenches with dielectric, depositing passivation layers over and within the first trenches, and etching second trenches through the passivation layers into the first trenches, and filling the second trenches to form a substrate-embedded metal grid. Optionally, the bottoms of the first trenches are filled by depositing and etching a lower fill material prior to depositing the passivation layers. The method prevents the passivation layers from pinching off in a way that causes voids within the first trenches. The result is better optical performance such as increased quantum efficiency and reduced crosstalk.


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