The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2026
Filed:
Oct. 16, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Kuo-Ju Chen, Taichung City, TW;
Te-Jui Yen, Hsinchu City, TW;
Liang-Yin Chen, Hsinchu City, TW;
Chi On Chui, Hsinchu City, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method includes a number of operations. An interlayer dielectric (ILD) layer is formed over a source/drain region on a substrate. A source/drain contact extending through the ILD layer to electrically connect with the source/drain region is formed. An air gap extending through the ILD layer is formed. An implantation energy absorption dielectric layer is formed over the ILD layer. An implantation process is performed on the implantation energy absorption dielectric layer, wherein the implantation process causes the ILD layer expands to seal the air gap. A first implant-free dielectric layer is formed over the implantation energy absorption dielectric layer. A second implant-free dielectric layer is formed over the first implant-free dielectric layer. A source/drain via extending through the second implant-free dielectric layer, the first implant-free dielectric layer, and the implantation energy absorption dielectric layer to the source/drain contact is formed.