The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Mar. 31, 2023
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Kwang-Soo Kim, Sunnyvale, CA (US);

Makoto Shibuya, Tokyo, JP;

Woochan Kim, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 70/40 (2026.01); H10W 40/25 (2026.01); H10W 70/05 (2026.01); H10W 72/00 (2026.01); H10W 72/50 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/429 (2026.01); H10W 40/255 (2026.01); H10W 70/093 (2026.01); H10W 70/481 (2026.01); H10W 74/01 (2026.01); H10W 74/114 (2026.01); H10W 72/5363 (2026.01); H10W 72/552 (2026.01); H10W 72/5522 (2026.01); H10W 72/5524 (2026.01); H10W 72/5525 (2026.01); H10W 72/555 (2026.01); H10W 72/884 (2026.01); H10W 90/736 (2026.01); H10W 90/753 (2026.01); H10W 90/755 (2026.01);
Abstract

A semiconductor device includes: a package substrate having a device mount surface and on an opposite bottom side surface; at least one semiconductor die mounted on the device mount surface; and leads having a base portion attached to the device mount surface and having an internal portion extending away from a first bend at a first angle, the internal portion of the leads extending to a second bend, a remaining portion of the leads extending from the second bend and lying in a horizontal plane parallel to the device mount surface, the leads having a third bend in the remaining portion forming terminals extending at a second angle with respect to the horizontal plane of the remaining portion. Mold compound covers the device mount surface, portions of the leads, and the semiconductor die. The terminals are exposed at a board side surface of the mold compound.


Find Patent Forward Citations

Kim, Kwang-Soo. (2026). Semiconductor device package for press fit assembly (U.S. Patent No. 12660640). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12660640

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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