The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2026

Filed:

Sep. 29, 2022
Applicant:

Zhuhai Access Semiconductor Co., Ltd, Guangdong, CN;

Inventors:

Xianming Chen, Guangdong, CN;

Xiaowei Xu, Guangdong, CN;

Gao Huang, Guangdong, CN;

Benxia Huang, Guangdong, CN;

Wenjian Lin, Guangdong, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/67 (2026.01); H10W 70/05 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/688 (2026.01); H10W 70/05 (2026.01); H10W 70/093 (2026.01); H10W 70/095 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 90/00 (2026.01); H10W 90/401 (2026.01); H10W 90/724 (2026.01); H10W 90/754 (2026.01);
Abstract

A packaging structure includes multiple packaging units, and the packaging units include a hard plate region, a winding region, and a fan-out region. In the packaging structure, the hard plate region of the packaging unit is arranged in a stacked manner, some or all of the fan-out regions are packaged with a chip, and some or all of the fan-out regions packaged with a chip are stacked with the hard plate regions after being bent by the winding region. So designed, each fan-out region is individually packaged and then packaged by stacking with each other to achieve the interconnections between a chip and a chip, and between a chip and a substrate without interference between the packaging units.


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