The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2026

Filed:

May. 25, 2023
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Xinru Zeng, Wuhan, CN;

Xin Feng, Wuhan, CN;

Peng Chen, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H10W 42/20 (2026.01); H10W 70/685 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 90/24 (2026.01);
U.S. Cl.
CPC ...
H10W 42/20 (2026.01); H10W 70/685 (2026.01); H10W 74/014 (2026.01); H10W 74/117 (2026.01); H10W 90/00 (2026.01); H10W 90/701 (2026.01); H10W 72/07331 (2026.01); H10W 90/24 (2026.01); H10W 90/732 (2026.01); H10W 90/734 (2026.01);
Abstract

The present application provides chip package structures and manufacturing methods thereof. In one example, the chip package structure includes: a base board including a grounding pad; a chip assembly located at a first surface of the base board; a package body covering the chip assembly, wherein a side wall of the package body is located in an extension direction of a side wall of the base board, and the side wall of the package body and the first surface of the base board have an acute included angle therebetween; and a shielding layer covering the side walls of the package body and the base board and electrically connected with the grounding pad.


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