The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2026
Filed:
Jun. 23, 2023
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Ruqiang Bao, Niskayuna, NY (US);
Jingyun Zhang, Albany, NY (US);
Junli Wang, Slingerlands, NY (US);
Chen Zhang, Santa Clara, CA (US);
Uzma Rana, Slingerlands, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2023.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01); H01L 29/786 (2006.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10D 62/121 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 64/017 (2025.01); H10W 90/00 (2026.01);
Abstract
A semiconductor structure including a plurality of stacked devices having different gate dielectrics is provided. The different gate dielectrics for the stacked devices are designed to improve the performance and the reliability for each of the stacked devices.