The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Sep. 21, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Tsung-Sheng Kang, Ballston Lake, NY (US);

Tao Li, Slingerlands, NY (US);

Ruilong Xie, Niskayuna, NY (US);

Jingyun Zhang, Albany, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/85 (2025.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/67 (2025.01); H10D 62/13 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10B 80/00 (2023.01);
U.S. Cl.
CPC ...
H10D 84/853 (2025.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 30/6735 (2025.01); H10D 62/154 (2025.01); H10D 62/158 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01); H10B 80/00 (2023.02);
Abstract

A semiconductor structure provides a spacer directly contacting a sidewall of portion of a hardmask material, a sidewall of a portion of a backside interlayer dielectric material, and a sidewall of a portion of a semiconductor substrate on the portion of a hardmask material. The spacer resides directly below and contacts a liner of a shallow trench isolation that is between a passive device region and an active device region. The spacer prevents undercutting of the semiconductor substrate in the protected region between the active device region and the passive device region during backside contact formation.


Find Patent Forward Citations

Kang, Tsung-Sheng. (2026). Spacer protecting semiconductor substrate under passive device during backside contact formation (U.S. Patent No. 12641874). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12641874

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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