The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Sep. 02, 2022
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ruilong Xie, Niskayuna, NY (US);

Shogo Mochizuki, Mechanicville, NY (US);

Daniel Charles Edelstein, White Plains, NY (US);

Lawrence A. Clevenger, Saratoga Springs, NY (US);

Brent A. Anderson, Jericho, VT (US);

Kisik Choi, Watervliet, NY (US);

Chanro Park, Clifton Park, NY (US);

Christian Lavoie, Pleasantville, NY (US);

Cornelius Brown Peethala, Slingerlands, NY (US);

Son Nguyen, Schenectady, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 62/121 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6757 (2025.01); H10D 64/018 (2025.01);
Abstract

Embodiments of the invention include a transistor comprising a gate region and an epitaxial region, the transistor comprising a frontside opposite a backside. A backside contact is coupled to the epitaxial region and separated from the gate region by a bottom dielectric isolation layer and a backside protective spacer.


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