The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2026
Filed:
Feb. 19, 2024
Achronix Semiconductor Corporation, Santa Clara, CA (US);
Raymond Nijssen, San Jose, CA (US);
Daniel Pugh, Los Gatos, CA (US);
Naveen Bharathwaj Akesh, Los Gatos, CA (US);
Christopher C. Lafrieda, Ridgefield, NJ (US);
Sriram Radhakrishnan, Santa Clara, CA (US);
Ronak Mehta, Santa Clara, CA (US);
Virantha Namal Ekanayake, Baltimore, MD (US);
Achronix Semiconductor Corporation, Santa Clara, CA (US);
Abstract
Memory blocks often consume many switch box resources. An 8-bit memory using 8-bit addressing uses at least eight address lines, eight data lines, a write-enable line, and a read-enable line. Using an auto address mode, the address and data are multiplexed on the same lines. The initial address and a stride are provided before the writing process begins. Between writes, the address is incremented by the stride. Thus, the memory block is able to determine the address for the next write based on the starting address and the stride, and does not need to receive the new address on the address lines. The auto address mode may be implemented by including a logic block within the memory block. The logic block may be programmed for purposes other than an auto address mode.