The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Sep. 15, 2023
Applicant:

Bridge Semiconductor Corp., Taipei City, TW;

Inventors:

Charles W. C. Lin, Singapore, SG;

Chia-Chung Wang, Hsinchu County, TW;

Assignee:

BRIDGE SEMICONDUCTOR CORP., Taipei City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/00 (2006.01); H10W 70/40 (2026.01); H10W 72/00 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/479 (2026.01); H10W 72/884 (2026.01); H10W 90/736 (2026.01); H10W 90/754 (2026.01);
Abstract

A terminal structure includes an electrically conductive post, an electrically conductive flange, and a stress buffer. The electrically conductive post has a bottom surface at a first level and an upper sidewall laterally covered by the stress buffer. The stress buffer has a bottom surface at a second level between the top surface and the bottom surface of the electrically conductive post. The electrically conductive flange extends laterally from the upper sidewall of the electrically conductive post to an outer peripheral edge thereof, and has a depression surface at a third level between the top surface and the bottom surface of the electrically conductive post. Accordingly, the terminal structure has multi-level staggered configuration and is advantageous to achieving the desired wetting height for robust visual inspection and improving primary and secondary board-level reliability.


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