The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Sep. 24, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kirby Maxey, Hillsboro, OR (US);

Ashish Verma Penumatcha, Beaverton, OR (US);

Carl Naylor, Portland, OR (US);

Chelsey Dorow, Portland, OR (US);

Kevin O'brien, Portland, OR (US);

Shriram Shivaraman, Hillsboro, OR (US);

Tanay Gosavi, Portland, OR (US);

Uygar Avci, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H01L 21/02 (2006.01); H01L 21/443 (2006.01); H10D 48/36 (2025.01); H10D 62/10 (2025.01); H10D 62/80 (2025.01); H10D 64/62 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10D 48/362 (2025.01); H01L 21/02568 (2013.01); H01L 21/0259 (2013.01); H01L 21/443 (2013.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 62/80 (2025.01); H10D 64/62 (2025.01); H10D 99/00 (2025.01);
Abstract

Transistors, devices, systems, and methods are discussed related to transistors including 2D material channels and heterogeneous 2D materials on the 2D material channels and coupled to source and drain metals, and their fabrication. The 2D material channels of the transistor allow for gate length scaling, improved switching performance, and other advantages and the heterogeneous 2D materials improve contact resistance of the transistor devices.


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