The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2026
Filed:
Jan. 19, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Meng-Che Tu, Hsinchu, TW;
PO-Nan Yeh, Hsinchu, TW;
Miao-Ken Hung, Hsinchu, TW;
PO-Han Wang, Hsinchu, TW;
Yu-Hsiang Hu, Hsinchu, TW;
Hung-Jui Kuo, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
According to one embodiment, a semiconductor device is provided. The semiconductor device includes a first semiconductor module, a redistribution layer (RDL) module and a second semiconductor module. The RDL module is disposed on the first semiconductor module. The RDL module includes a plurality of polymer layers and a plurality of vias. The polymer layers are stacked on the first semiconductor module. The vias are disposed within the polymer layers. The second semiconductor module is disposed on the RDL module. A height difference of a top surface of at least one of the polymer layers ranges from 0 um to 1 um; or an angle between a sidewall and a bottom surface of at least one of the vias ranges from 90° to 95°; or a glass transition temperature (Tg) of at least one of the polymer layers is larger than 260° C.