The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2026

Filed:

Mar. 23, 2023
Applicant:

Stats Chippac Pte. Ltd., Singapore, SG;

Inventors:

Yongmoo Shin, Incheon, KR;

Heesoo Lee, Incheon, KR;

Heeyoun Kim, Incheon, KR;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/29 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/565 (2013.01); H01L 23/29 (2013.01); H01L 23/66 (2013.01); H01L 24/16 (2013.01); H01L 2223/6661 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/186 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A semiconductor device has a substrate and an electrical component disposed over the substrate. A first encapsulant is deposited over the electrical component and substrate. A first shielding layer with a graphene core shell is formed on a surface of the first encapsulant. A second encapsulant is deposited over the first encapsulant and first shielding layer. A second shielding layer is formed over the second encapsulant. The first shielding layer is formed at least partially in an opening of the first encapsulant. The graphene core shell has a copper core. The first shielding layer has a plurality of cores covered by graphene and the graphene is interconnected within the first shielding layer to form an electrical path. The electrical path dissipates any charge incident on shielding layer, such as an ESD event, to reduce or inhibit the effects of EMI, RFI, and other inter-device interference.


Find Patent Forward Citations

Loading…