The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2026

Filed:

Jul. 25, 2023
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Zhipeng Dong, Wuhan, CN;

Li Xiang, Wuhan, CN;

Zhuo Chen, Wuhan, CN;

Shuai Wang, Wuhan, CN;

Chunyuan Hou, Wuhan, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/16 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3445 (2013.01); G11C 16/16 (2013.01);
Abstract

Implementations of the present disclosure provide a memory device, an operation method thereof, and a memory system. The memory device may include a memory cell array including a plurality of blocks. The memory device may include a peripheral circuit coupled to the memory cell array. The peripheral circuit may be configured to apply a plurality of different erasure verification voltages to a selected block among the plurality of blocks after applying a first effective erasure voltage to the selected block. The peripheral circuit may be configured to determine a second effective erasure voltage applied to the selected block according to a plurality of erasure verification results corresponding to the plurality of different erasure verification voltages. The second effective erasure voltage may be greater than the first effective erasure voltage.


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