The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2026

Filed:

Feb. 22, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Zheng Yong Liang, Kaohsiung, TW;

Wei-Ting Yeh, Hsinchu, TW;

Jyh-Cherng Sheu, Hsinchu, TW;

Yu-Yun Peng, Hsinchu, TW;

Keng-Chu Lin, Ping-Tung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/02 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/02016 (2013.01); H01L 21/02186 (2013.01); H01L 21/0231 (2013.01); H01L 21/02334 (2013.01); H01L 21/76822 (2013.01); H01L 23/5226 (2013.01);
Abstract

A carrier structure and methods of forming and using the same are described. In some embodiments, the method includes forming one or more devices over a substrate, forming a first interconnect structure over the one or more devices, and bonding the first interconnect structure to a carrier structure. The carrier structure includes a semiconductor substrate, a release layer, and a first dielectric layer, and the release layer includes a metal nitride. The method further includes flipping over the one or more devices so the carrier structure is located at a bottom, performing backside processes, flipping over the one or more devices so the carrier structure is located at a top, and exposing the carrier structure to IR lights. Portions of the release layer are separated from the first dielectric layer.


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