The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Jul. 13, 2023
Applicant:

Zhuhai Access Semiconductor Co., Ltd, Guangdong, CN;

Inventors:

Xianming Chen, Guangdong, CN;

Wenjian Lin, Guangdong, CN;

Gao Huang, Guangdong, CN;

Benxia Huang, Guangdong, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3121 (2013.01); H01L 21/4857 (2013.01); H01L 21/563 (2013.01); H01L 23/49811 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 2224/16225 (2013.01);
Abstract

A manufacturing method for an embedded flip chip package substrate includes laminating a first dielectric layer on the first line layer formed on a carrier plate, forming a first window on the first dielectric layer, filling a first copper post in the first window, forming a second window on the first dielectric layer, mounting a flip chip to the second window, sequentially stacking a packaging layer and a second dielectric layer covered with a first metal layer on the first dielectric layer, pressing a packaging layer encapsulating the first copper post and the flip chip and a second dielectric layer, curing the packaging layer, opening a hole through the first metal layer, the second dielectric layer and the packaging layer to form an interlayer conducting blind hole, forming a second line layer on the first metal layer, and removing the carrier plate to obtain a package substrate.


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