The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Aug. 08, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yi Yang Wei, Hsinchu, TW;

Bi-Shen Lee, Hsinchu, TW;

Hsin-Yu Lai, Hsinchu, TW;

Hai-Dang Trinh, Hsinchu, TW;

Hsing-Lien Lin, Hsin-Chu, TW;

Hsun-Chung Kuang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/68 (2025.01); H10B 51/30 (2023.01); H10B 53/00 (2023.01); H10D 1/68 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 64/689 (2025.01); H10B 51/30 (2023.02); H10B 53/00 (2023.02); H10D 1/688 (2025.01); H10D 1/694 (2025.01); H10D 1/696 (2025.01); H10D 64/033 (2025.01);
Abstract

Various embodiments of the present disclosure are directed towards a memory device including a first bottom electrode layer over a substrate. A ferroelectric switching layer is disposed over the first bottom electrode layer. A first top electrode layer is disposed over the ferroelectric switching layer. A second bottom electrode layer is disposed between the first bottom electrode layer and the ferroelectric switching layer. The second bottom electrode layer is less susceptible to oxidation than the first bottom electrode layer.


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