The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Jun. 22, 2022
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Nicholas Anthony Lanzillo, Wynantskill, NY (US);

Ruilong Xie, Niskayuna, NY (US);

Huai Huang, Clifton Park, NY (US);

Hosadurga Shobha, Niskayuna, NY (US);

Lawrence A. Clevenger, Saratoga Springs, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5286 (2013.01); H01L 21/76805 (2013.01); H01L 21/76831 (2013.01); H01L 23/5226 (2013.01);
Abstract

The semiconductor device includes a first metal layer, a second metal layer, a metal plane, a third dielectric layer and a fourth dielectric layer. The first metal layer comprises a first dielectric layer with a first plurality of signal track and a first plurality of power rails. The second metal layer comprises a second dielectric layer with a second plurality of signal tracks and a second plurality of power rails. The metal plane is between the first metal layer and the second metal layer. The third dielectric layer is between the first metal layer and the metal plane. The fourth dielectric layer is between the second metal layer and the metal plane.


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