The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Jul. 19, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei City, CN;

Inventors:

Youming Liu, Hefei City, CN;

Yi Jiang, Hefei City, CN;

Deyuan Xiao, Hefei City, CN;

Guangsu Shao, Hefei City, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/482 (2023.02); H10B 12/0335 (2023.02); H10B 12/312 (2023.02); H10B 12/488 (2023.02);
Abstract

The present disclosure provides a semiconductor structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The semiconductor structure includes: a substrate, a first stacked structure is disposed on the substrate, and includes a memory cell array; a plurality of word lines (WLs), arranged at intervals and extending along a first direction; a plurality of bit lines (BLs), arranged at intervals and extending along a second direction, one end of each of the plurality of BLs away from the memory cell array forms a step in the first direction, each BL is provided with a groove on a surface of the step, and the second direction and the first direction cross each other; and a plurality of BL plugs, arranged at intervals and extending along the first direction, one end of each BL plug is correspondingly disposed in the groove of one of the BLs.


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