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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12568775 B1

PDFFull Text
Date of Patent:
Mar. 03, 2026

Filed:

Jul. 15, 2022

Method for forming a memory device at a backside of a wafer substrate, and memory cell including a memory device at a backside of a wafer substrate

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chung-Liang Cheng, Hsinchu, TW;

Lin-Yu Huang, Hsinchu, TW;

Wen-Ting Lan, Hsinchu, TW;

Li-Zhen Yu, Hsinchu, TW;

Huang-Lin Chao, Hsinchu, TW;

Pinyen Lin, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;

Attorney:

Birch, Stewart, Kolasch & Birch, LLP

Primary Examiner:

Shih Tsun a Chou

Int. Cl.
CPC ...
H10N 70/00 (2023.01); H10B 63/00 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10N 70/066 (2023.02); H10B 63/30 (2023.02); H10N 70/24 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02);
Abstract

A method is provided for forming a memory device on a backside portion of a wafer substrate. In one step, a circuit device is formed on a frontside portion of the wafer substrate. In one step, the wafer substrate is etched to form a substrate indentation that exposes a portion of a circuit device. In one step, a memory device is formed, at least in part, in the substrate indentation.

Find Patent Forward Citations

Cheng, Chung-Liang. (2026). Method for forming a memory device at a backside of a wafer substrate, and memory cell including a memory device at a backside of a wafer substrate (U.S. Patent No. 12568775). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12568775

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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