The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Jun. 10, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chia-Ling Wu, Tainan, TW;

Ru-Shang Hsiao, Jhubei, TW;

I-Shan Huang, Tainan, TW;

Ying Hsin Lu, Tainan, TW;

Tsung-Jui Wu, Tainan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/3065 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3065 (2013.01); H01L 21/31138 (2013.01);
Abstract

The present disclosure describes a method for fabricating semiconductor structures having transistor arrays with different pitches. The method can include forming a first and second arrays of structures on a semiconductor substrate. The second array of structures can be blocked with a first mask while exposing the first array. A first treatment can be applied to the first array of structures. The first array of structures can be blocked with a second mask while exposing the second array of structures. A second treatment can be applied to the second array of structures, where the second treatment is different from the first treatment.


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