The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2026
Filed:
May. 10, 2022
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Inventors:
Neil Quinn Murray, Hsinchu, TW;
Kuo-Chang Chiang, Hsinchu, TW;
Mauricio Manfrini, Hsinchu County, TW;
Tsann Lin, Taipei, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 87/00 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6739 (2025.01); H10D 87/00 (2025.01); H10D 99/00 (2025.01); H10D 30/6755 (2025.01);
Abstract
A transistor includes a gate electrode, a gate dielectric layer, a short range order layer, a channel layer, and source/drain regions. The gate dielectric layer is disposed over the gate electrode. The short range order layer is disposed between the gate electrode and the gate dielectric layer. The short ranger order layer has slanted sidewalls. The channel layer is disposed on the gate dielectric layer. The source/drain regions are disposed on the channel layer.