The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Aug. 08, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Yen-Chieh Huang, Changhua County, TW;

Song-Fu Liao, Taipei, TW;

PO-Ting Lin, Taichung, TW;

Hai-Ching Chen, Hsinchu, TW;

Sai-Hooi Yeong, Hsinchu, TW;

Yu-Ming Lin, Hsinchu, TW;

Chung-Te Lin, Taiwan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/69 (2025.01); H10D 30/60 (2025.01); H10D 30/67 (2025.01); H10D 64/23 (2025.01); H10D 64/68 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/701 (2025.01); H10D 30/611 (2025.01); H10D 30/6755 (2025.01); H10D 64/258 (2025.01); H10D 64/691 (2025.01); H10D 99/00 (2025.01);
Abstract

A ferroelectric field effect transistor (FeFET) having a double-gate structure includes a first gate electrode, a first ferroelectric material layer over the first gate electrode, a semiconductor channel layer over the first ferroelectric material layer, source and drain electrodes contacting the semiconductor channel layer, a second ferroelectric material layer over the semiconductor channel layer, and a second gate electrode over the second ferroelectric material layer.


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