The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

May. 10, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yong-Tian Hou, Singapore, SG;

Yuan-Shun Chao, Hsinchu County, TW;

Chien-Hao Chen, Chuangwei Township, TW;

Cheng-Lung Hung, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 21/28 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4966 (2013.01); H01L 21/28176 (2013.01); H01L 21/28229 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01); H01L 29/6659 (2013.01); H01L 29/7833 (2013.01); H01L 21/28088 (2013.01);
Abstract

A semiconductor device includes a gate dielectric layer and a gate electrode formed on the gate dielectric layer. The gate electrode includes a first metal layer, a second metal layer, and a third metal layer. The first metal layer includes an oxygen-gettering composition. The second metal layer includes oxygen. The third metal layer includes an interface with a polysilicon layer.


Find Patent Forward Citations

Quick Actions:

Hou, Yong-Tian. (2026). Integrated circuit metal gate structure and method of fabricating thereof (U.S. Patent No. 12532531). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12532531

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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