The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2026
Filed:
Aug. 31, 2023
Stats Chippac Pte. Ltd., Singapore, SG;
Kyuwon Lee, Gyeonggi-do, KR;
Jiwon Jang, Seoul, KR;
Myeongjin Kim, Incheon, KR;
Hyesun Kim, Incheon, KR;
Youngdeuk Lee, Seoul, KR;
Youngjin Woo, Gyeonggi-do, KR;
STATS ChipPAC Pte. Ltd., Singapore, SG;
Abstract
A semiconductor device has a semiconductor wafer or substrate including a plurality of semiconductor die. A plurality of first bumps is formed over an active surface of the semiconductor wafer. A plurality of second bumps is formed within a saw street of the semiconductor wafer separating the plurality of semiconductor die. A top surface of the first bumps is coplanar with a top surface of the second bumps. The second bumps are formed within a first saw street of the semiconductor wafer and further within a second saw street of the semiconductor wafer different from the first saw street. The first bumps are electrically connected to the semiconductor die to provide a function for the semiconductor die. The second bumps are dummy bumps that have no electrical function for the semiconductor die. The semiconductor wafer is singulated through the saw street and second bumps.