The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Apr. 01, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Abhishek Anil Sharma, Portland, OR (US);

Wilfred Gomes, Portland, OR (US);

Pushkar Ranade, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/44 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76843 (2013.01); H01L 21/76873 (2013.01); H01L 21/76877 (2013.01); H01L 23/44 (2013.01); H01L 23/53238 (2013.01);
Abstract

Integrated circuit interconnect structures including an interconnect metallization feature comprising a sidewall reacted with a chalcogen into a low resistance liner. A portion of a backbone material or a metal seed layer may be advantageously converted into a metal chalcogenide, which can lower scattering resistance of an interconnect feature relative to alternative diffusion barrier materials, such a tantalum. Scattering resistance of such metal chalcogenide liner materials may be further reduced by actively cooling an IC, for example to cryogenic temperatures.


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