The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Jan. 10, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tung-Liang Shao, Hsinchu, TW;

You-Rong Shaw, Hsinchu, TW;

Yu-Sheng Huang, Hemei Township, TW;

Chen-Hua Yu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/473 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/473 (2013.01); H01L 21/4878 (2013.01); H01L 21/565 (2013.01); H01L 23/315 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 25/0652 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/83359 (2013.01); H01L 2924/1632 (2013.01);
Abstract

In an embodiment, a package includes an encapsulant laterally surrounding a first integrated circuit device and a second integrated circuit device, wherein the first integrated circuit device includes a die and a heat dissipation structure over the die; a sealant disposed over the heat dissipation structure; an adhesive disposed over the second integrated circuit device; and a lid disposed over the sealant and the adhesive, wherein the lid includes a first cooling passage and a second cooling passage, the first cooling passage including an opening at a bottom of the lid and aligned to the heat dissipation structure, the second cooling passage including channels aligned to the second integrated circuit device and being distant from the bottom of the lid.


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