The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
Dec. 04, 2022
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Wen-Kai Lin, Yilan County, TW;
Chi-Horn Pai, Tainan, TW;
Sheng-Yuan Hsueh, Tainan, TW;
Kuo-Hsing Lee, Hsinchu County, TW;
Chih-Kai Kang, Tainan, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/762 (2006.01); H01L 23/485 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H01L 21/762 (2013.01); H01L 21/76831 (2013.01); H01L 21/76897 (2013.01); H10D 64/017 (2025.01);
Abstract
A method for fabricating a semiconductor device includes the steps of first forming a shallow trench isolation (STI) in a substrate, forming a first gate structure on the substrate and adjacent to the STI, forming a first doped region between the first gate structure and the STI, forming a second doped region between the first doped region and the first gate structure, forming a first contact plug on the first doped region, and then forming a second contact plug on the second doped region.