The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2025
Filed:
Jan. 08, 2024
Amkor Technology Singapore Holding Pte. Ltd;
Dong Joo Park, Seoul, KR;
Jin Seong Kim, Seoul, KR;
Ki Wook Lee, Seoul, KR;
Dae Byoung Kang, Kyunggi-do, KR;
Ho Choi, Seoul, KR;
Kwang Ho Kim, Kyunggi-do, KR;
Jae Dong Kim, Seoul, KR;
Yeon Soo Jung, Seoul, KR;
Sung Hwan Cho, Kyunggi-do, KR;
Amkor Technology Singapore Holding Pte. Ltd., Singapore, SG;
Abstract
A semiconductor device includes a substrate with a conductive pattern. A semiconductor die is electrically connected to the substrate and both the semiconductor die and the substrate are at least partially covered by a package body. In some examples, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In some examples, through-mold vias are included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body. In some examples, an interposer is electrically connected to the through-mold vias and may be covered by the package body and/or disposed in spaced relation thereto. In some examples, the interposer may not be electrically connected to the through-mold vias but may have one or more semiconductor dies of the semiconductor device electrically connected thereto.