The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2025

Filed:

Apr. 01, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Abhishek Anil Sharma, Portland, OR (US);

Pushkar Ranade, San Jose, CA (US);

Wilfred Gomes, Portland, OR (US);

Rajabali Koduri, Saratoga, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/401 (2006.01); G06F 12/0846 (2016.01); G06F 12/0897 (2016.01); G11C 11/4094 (2006.01); G11C 11/4096 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); G06F 12/0848 (2013.01); G06F 12/0897 (2013.01); G11C 11/4094 (2013.01); G11C 11/419 (2013.01); G06F 2212/604 (2013.01);
Abstract

Methods and apparatus to implement an integrated circuit to operate based on data access characteristics. For example, the integrated circuit comprises a first array comprising a first plurality of memory cells, a second array comprising a second plurality of memory cells, and both first and second arrays to store data of a processor. The second plurality of memory cells implements a selector transistor of a memory cell within using a thin-film transistor (TFT), and a memory control circuit is to write a first set of bits to the first array and a second set of bits to the second array upon determining the first set of bits is to be accessed more frequently than the second set of bits.


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