The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2025

Filed:

Sep. 04, 2022
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Chang Seok Kang, Santa Clara, CA (US);

Gill Yong Lee, San Jose, CA (US);

Fred Fishburn, Apotos, CA (US);

Tomohiko Kitajima, San Jose, CA (US);

Sung-Kwan Kang, San Jose, CA (US);

Sony Varghese, Manchester, MA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5283 (2013.01); H01L 21/76816 (2013.01); H01L 21/76895 (2013.01); H01L 23/535 (2013.01);
Abstract

A semiconductor manufacturing process for forming a three-dimensional (3D) memory structure and a semiconductor device having a 3D memory structure is described. The 3D memory structure comprises layers of memory cells with L shaped conductive layers where the L shaped conductive layers of each layer are coupled to metal lines disposed above the top or upper most layer such that the memory cells in each layer can be coupled to control circuitry.


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