The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Apr. 20, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Yu-Sheng Lin, Zhubei, TW;

Jyun-Lin Wu, Hsinchu, TW;

Yao-Chun Chuang, Hsinchu, TW;

Chin-Fu Kao, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01N 3/20 (2006.01); G01N 19/04 (2006.01);
U.S. Cl.
CPC ...
G01N 3/20 (2013.01); G01N 19/04 (2013.01); G01N 2203/0064 (2013.01);
Abstract

An embodiment interfacial bonding test structure may include a first substrate having a first planar surface, a second substrate having a second planar surface that is parallel to the first planar surface, a first semiconductor die, and a second semiconductor die, each semiconductor die bonded between the first substrate and the second substrate thereby forming a sandwich structure. The first semiconductor die and the second semiconductor die may be bonded to the first surface with a first adhesive and may be bonded to the second surface with a second adhesive. The first semiconductor die and the second semiconductor die may be displaced from one another by a first separation along a direction parallel to the first planar surface and the second planar surface. The second substrate may include a notch having an area that overlaps with an area of the first separation in a plan view.


Find Patent Forward Citations

Loading…