The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

Sep. 23, 2022
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Yu-Jen Huang, Taichung, TW;

Chu-Chun Hsieh, Taichung, TW;

Hsiu-Han Liao, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/762 (2006.01); H10B 41/30 (2023.01);
U.S. Cl.
CPC ...
H01L 21/31111 (2013.01); H01L 21/76224 (2013.01); H10B 41/30 (2023.02);
Abstract

A method for forming a semiconductor structure is provided. The method includes providing a semiconductor substrate with a plurality of floating gates on it, and an isolation structure between the floating gates. The method includes performing a first etching process to recess the isolation structure and to form an opening between the floating gates to expose a portion of the sidewalls of the floating gates. The method includes conformally forming a liner in the opening. The method includes performing an ion implantation process to implant a dopant into the isolation structure below the liner. The method includes performing a second etching process to remove the liner and a portion of the isolation structure below the liner, thereby giving the bottom portion of the opening a tapered profile.


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