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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12431412 B1

PDFFull Text
Date of Patent:
Sep. 30, 2025

Filed:

Jul. 20, 2023

Contact plugs for semiconductor device and method of forming same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Mrunal A. Khaderbad, Hsinchu, TW;

Yasutoshi Okuno, Hsinchu, TW;

Sung-Li Wang, Zhubei, TW;

Pang-Yen Tsai, Jhubei, TW;

Shen-Nan Lee, Jhudong Township, TW;

Teng-Chun Tsai, Hsinchu, TW;

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Ajay Ojha

Int. Cl.
CPC ...
H10D 30/01 (2025.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/485 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H10D 30/62 (2025.01); H10D 30/69 (2025.01); H10D 62/13 (2025.01); H10D 62/83 (2025.01); H10D 64/01 (2025.01); H10D 64/20 (2025.01); H10D 64/23 (2025.01); H10D 64/62 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H01L 23/485 (2013.01); H01L 21/02634 (2013.01); H01L 21/28562 (2013.01); H01L 21/31116 (2013.01); H01L 21/76814 (2013.01); H01L 21/76822 (2013.01); H01L 21/76826 (2013.01); H01L 21/76831 (2013.01); H01L 21/76846 (2013.01); H01L 21/76847 (2013.01); H01L 23/528 (2013.01); H01L 23/532 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 30/6219 (2025.01); H10D 62/151 (2025.01); H10D 62/83 (2025.01); H10D 64/017 (2025.01); H10D 64/20 (2025.01); H10D 64/23 (2025.01); H10D 64/62 (2025.01); H10D 84/0158 (2025.01); H10D 84/0193 (2025.01); H10D 84/038 (2025.01); H10D 30/797 (2025.01);
Abstract

A semiconductor device and a method of forming the same are provided. A method includes forming a gate over a semiconductor structure. An epitaxial source/drain region is formed adjacent the gate. A dielectric layer is formed over the epitaxial source/drain region. An opening extending through the dielectric layer and exposing the epitaxial source/drain region is formed. A conductive material is non-conformally deposited in the opening. The conductive material fills the opening in a bottom-up manner.

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