The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Apr. 16, 2024
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Hongtao Liu, Wuhan, CN;

Dejia Huang, Wuhan, CN;

Wenzhe Wei, Wuhan, CN;

Ying Huang, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/26 (2006.01); G11C 16/30 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/0433 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/102 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3404 (2013.01);
Abstract

A memory device includes a memory array including memory strings and a first word line, and a peripheral circuit coupled to the memory array. Each memory string includes a select gate transistor and memory cells. The peripheral circuit is configured to apply, during a first time period, a program voltage to the first word line to program a first memory cell in a selected memory string, apply, during a second time period after the first time period, a first verify voltage to the first word line to verify the first memory cell, compare the first verify voltage with a target voltage to obtain a comparing result, and in response to the comparing result indicative of the first verify voltage being higher than the target voltage, turn off, during a third time period between the first and the second time periods, the select gate transistor in an unselected memory string.


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