The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2025
Filed:
Sep. 13, 2023
Qualcomm Incorporated, San Diego, CA (US);
Ravindranath Doddi, Hyderabad, IN;
Umamaheshwaran V, Salem, IN;
Afreen Haider, Muzaffarpur, IN;
Lekhya Pavani Godavarthi, Hyderabad, IN;
Harinatha Reddy Ramireddy, Hyderabad, IN;
James Lionel Panian, San Marcos, CA (US);
Ramacharan Sundararaman, San Jose, CA (US);
Santhosh Reddy Akavaram, Hyderabad, IN;
Qualcomm Incorporated, San Diego, CA (US);
Abstract
Various embodiments include methods and devices for implementing Universal Chiplet Interconnect Express (UCIe) link configuration for multi-module chiplets of a computing device. Embodiments may include transitioning a UCIe link in an active state having a first sideband that is active to the UCIe link in a reset state, and initializing at least one sideband for the UCIe link that is a different functional sideband of a multi-module chiplet than the first sideband following the reset state of the UCIe link. Embodiments may include reading sideband data configured to represent a functional sideband of the multi-module chiplet, and initializing the functional sideband as the at least one sideband. Embodiments may include reading sideband data configured to represent at least two functional sidebands of the multi-module chiplet, and initializing at least one functional sideband of the at least two functional sidebands as the at least one sideband.