The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2025
Filed:
Dec. 22, 2021
Intel Corporation, Santa Clara, CA (US);
Dheeraj Subbareddy, Portland, OR (US);
Arun Jangity, Sunnyvale, CA (US);
Ramya Yeluri, Mountain View, CA (US);
Mahesh K. Kumashikar, Bangalore, IN;
Atul Maheshwari, Portland, OR (US);
Ankireddy Nalamalpu, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Systems or methods of the present disclosure may provide a programmable logic device including multiple logic array blocks each having multiple programmable elements. The multiple logic array blocks are arranged in multiple rows that are segmented into multiple segments. The programmable logic device also includes repair circuitry disposed between the multiple segments. The repair circuitry remaps logic within a first segment of the multiple segments when a first logic array block of the multiple logic array blocks has failed. Moreover, the first segment includes the first logic array block.