The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Jan. 19, 2023
Applicant:

Zhuhai Access Semiconductor Co., Ltd., Zhuhai, CN;

Inventors:

Xianming Chen, Zhuhai, CN;

Lei Feng, Zhuhai, CN;

Benxia Huang, Zhuhai, CN;

Jindong Feng, Zhuhai, CN;

Jiangjiang Zhao, Zhuhai, CN;

Wenshi Wang, Zhuhai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01); H01L 23/552 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/4857 (2013.01); H01L 23/49838 (2013.01); H01L 23/49861 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 23/552 (2013.01);
Abstract

Disclosed are a method for manufacturing a support frame structure and a support frame structure. The support frame structure is used for embedded packaging, and includes: a metal plate comprising a support region and an opening region, at least one upper dielectric hole and at least one lower dielectric hole being formed respectively in upper and lower surfaces of the support region, the upper dielectric hole being communicated with the lower dielectric hole; at least one set of metal pillars comprising an upper metal pillar and a lower metal pillar, the upper metal pillar and the lower metal pillar being vertically connected to upper and lower surfaces of the metal plate, respectively; a dielectric layer comprising an upper dielectric layer and a lower dielectric layer, the upper dielectric layer and the lower dielectric layer being correspondingly formed on the upper surface of the metal plate and the upper dielectric hole and on a lower surface of the metal plate and the lower dielectric hole, respectively; and at least one core embedding cavity arranged in the opening region, running through the dielectric layer and the metal plate, and spaced from the upper dielectric hole and the lower dielectric hole by the dielectric layer.


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