The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2025
Filed:
Feb. 09, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chih-Hsuan Cheng, Hsinchu, TW;
Chieh-Fang Chen, Hsinchu County, TW;
Sheng-Chen Wang, Hsinchu, TW;
Chieh-Yi Shen, Taipei, TW;
Han-Jong Chia, Hsinchu, TW;
Feng-Ching Chu, Pingtung County, TW;
Meng-Han Lin, Hsinchu, TW;
Feng-Cheng Yang, Zhudong Township, TW;
Yu-Ming Lin, Hsinchu, TW;
Chung-Te Lin, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A method for forming a semiconductor memory structure is provided. The method includes forming a stack over a substrate, and the stack includes first dielectric layers and second dielectric layers vertically alternately arranged. The method also includes forming first dielectric pillars through the stack, and etching the stack to form first trenches. Sidewalls of the first dielectric pillars are exposed from the first trenches. The method also includes removing the first dielectric pillars to form through holes, removing the second dielectric layers of the stack to form gaps between the first dielectric layers, and forming first conductive lines in the gaps.