The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2025

Filed:

Jul. 24, 2020
Applicant:

Zhuhai Access Semiconductor Co., Ltd., Guangdong, CN;

Inventors:

Xianming Chen, Guangdong, CN;

Lei Feng, Guangdong, CN;

Weiyuan Yang, Guangdong, CN;

Benxia Huang, Guangdong, CN;

Yejie Hong, Guangdong, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 86/80 (2025.01); H10D 1/20 (2025.01); H10D 1/68 (2025.01);
U.S. Cl.
CPC ...
H10D 86/80 (2025.01); H10D 1/20 (2025.01); H10D 1/68 (2025.01);
Abstract

A capacitor and inductor embedded structure and a manufacturing method therefor, and a substrate are disclosed. The method includes: providing a metal plate; sequentially depositing and etching a first protective layer, a thin film dielectric layer, a second protective layer, and an upper electrode layer on an upper surface of the metal plate to form a thin film capacitor and a capacitor upper electrode; pressing an upper dielectric layer to the upper surface of the metal plate, covering the thin film capacitor and the capacitor upper electrode, and etching the metal plate to form a capacitor lower electrode; pressing a lower dielectric layer to a lower surface of the metal plate, and performing drilling on the upper dielectric layer and the lower dielectric layer to form inductor through holes and capacitor electrode through holes; electroplating metal to form an inductor and circuit layers.


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