The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2025
Filed:
Nov. 01, 2021
International Business Machines Corporation, Armonk, NY (US);
Huimei Zhou, Albany, NY (US);
Andrew M. Greene, Slingerlands, NY (US);
Michael P. Belyansky, Halfmoon, NY (US);
Oleg Gluschenkov, Tannersville, NY (US);
Robert Robison, Rexford, NY (US);
Juntao Li, Cohoes, NY (US);
Richard A. Conti, Altamont, NY (US);
Fee Li Lie, Albany, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor device includes a substrate with a planar top surface. At least a first gate cut stressor within a first gate cut region separates a first transistor region from a second transistor region. The first gate cut stressor is directly upon the planar top surface and applies a first tensile force perpendicular to a channel of the first transistor region and perpendicular to a channel of the second transistor region. The tensile force may improve hole and/or electron mobility within a transistor in the first transistor region and within a transistor in the second transistor region. The gate cut stressor may include a lower material within the gate cut region and an upper material upon the lower material. Alternatively, the gate cut stressor may include a liner material that lines the gate cut region and an inner material upon the liner material.